Staffing-Human Resources at Xilinx
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Xilinx - RTL Designer - DDR/C/Verilog (9-14 yrs)
Job Requirements :
- B.E/M.E/M.Tech or B.S/M.S in EE/CE with 9+ years of relevant experience.
- 5+ years of experience in memory controller design such as DDR4/3 or LPDDR4/3 or QDRII+/IV or RLDRAM.
- Requires proven track record in technical leadership of teams with 3+ engineers.
- Excellent Verilog and logic design concepts.
- Working knowledge of C; embedded experience with MicroBlaze preferred
- Hands-on experience with lab equipment including logic analyzers and high-speed oscilloscopes
- Working knowledge of signal integrity methods
- Knowledge of bus protocols like AXI/AHB.
- Excellent waveform debug skills using front-end industry standards design tools like VCS, NCSIM, and ModelSim.
- Excellent communication and problem-solving skills.
- Should have experience working in a geographically dispersed team and should be a strong team player.