Recruitment Specialist at Xilinx
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Xilinx - ASIC/VLSI Verification Engineer - System Verilog (6-15 yrs)
BE/B Tech with 6+years of experience in Verification
- Very good System Verilog/UVM/OVM knowledge with prior work experience on live projects.
- Knowledge of PCIE Gen3 protocol is required.
- Expertise in creating detailed test plan with well-defined functional coverage goals.
- Should be able to architect and implement self - generating / self- checking simulation verification environment to reach functional coverage goals using random/directed stimulus.
- Knowledge of scripting language like Perl, Shell, TCL or Python.
- Successful experience in 802.11 Wireless VLSI designs or other related technologies is a big plus.
- Knowledge of protocols like AXI and ARM subsystems and top level interconnects is plus.
- Highly motivated and independent contributor with good aptitude and attitude
Pls send your updated CV.
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