05/02 Ambrish Mishra
Talent Acquisition Executive at Confidential

Views:38 Applications:6 Rec. Actions:Recruiter Actions:4

VLSI Engineer - Verilog/System Verilog (4-8 yrs)

Ahmedabad/Pune Job Code: 407886

Sr. DV Engineer (VLSI)

Location: Ahmedabad, Pune

RESPONSIBILITIES :

- Understand the standards/specifications

- Architecture development and documenting implementation level details

- Hands on work for every aspect of verification cycle

- Responsible for the compliance with the latest Methodologies

- Define Functional Coverage matrix and Comprehensive Test plan

- Regression management and functional coverage closure

- DUT integration and verification for IP delivery sign-off

Required Skills & Experience :

- 5+ years of experience in the relevant field

- Hands-on experience of complete verification cycle with strong verification concepts - Verilog, SystemVerilog and UVM expertise

- Experience in any Processor based system, SoC, AMBA System bus and DMA concepts

- Hands on work experience on any of DDR/PCIe/Eth/USB/SATA/DP/HDMI/MIPI etc.

- Scripting for automation, release process, simulations, regressions

- Good command over written and oral communication

Desirable Skills & Experience :

- Lead the DUT-verification phase with 2 or more junior engineers

- Experience in FPGA based pre-silicon verification

if you are interested then please call me on 7689868308 Or Apply Here

Add a note
Something suspicious? Report this job posting.