13/08 Rishika
Recruitment Consultant at Vikash Technologies

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Vikash Technologies - FPGA Design Engineer - VHDL/Xilinx (3-5 yrs)

Bangalore Job Code: 480070

Edu : BE/B.Tech

Exp : 3+ yrs

Work Location : Marathahalli Bangalore

Job Description :

- Sound knowledge of FPGA front end design principles.

- Excellent command over HDL Verilog/VHDL.

- Sound knowledge of FPGA design principles. Working with Xilinx/Altera FPGA is preferable.

- Must have done RTL synthesis, constraints design, timing closure, RTL designs having CDC.

- Must have written test benches to verify the RTL design.

- Must have used the RTL development and debugging tools for FPGA (e.g. vivado for Xilinx).

- Must have implemented at least a few communication signal processing blocks in RTL (e.g. FFT/IFFT, AGC, Channel Estimation/Equalization, DPD, CFR, Turbo Enoder/Decoder).

- Must have good understanding of PHY Layer of at least one OFDM based wireless technology (e.g. 5G/LTE/ WiFi/WiMAX). LTE experience is preferable.

- Must know where to use FIFO or RAM in the design. Must have used FIFOs/RAM in the design.

- Should know how to write configurable RTL.

- Should have used CPRI/OBSA IPs to interface with the RF unit in a wireless communication system.

- Understanding of RF fundamentals, RF components, RF chain and it's working is advantageous

Women-friendly workplace:

Maternity and Paternity Benefits

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