09/04 Neha Jain
IT Recruiter at Infinity HR Consulting Services

Views:61 Applications:1 Rec. Actions:Recruiter Actions:0

Verification Manager - RTL Design (9-16 yrs)

Bangalore Job Code: 431733

Location : Bangalore, India

Job Description/Responsibilities :

Primary Responsibilities :

The employee will be responsible for leading the hardware verification team covering module and integration level RTL verification, as well as performance modeling, Speedcore and Speedster FPGA products. The employee is also expected to take-up hands-on responsibilities for some of the most complex verification tasks. The employee's responsibilities include the following:

- Manage the verification team, including setting of responsibilities, assigning of tasks, reviewing performance and ensuring technical growth

- Lead methodology development

- Lead verification planning

- Own functional verification at module-level and/or fullchip-level

- Testbench design

- Lead ATE functional vector generation

- Post-Si support

- Provide technical leadership to junior engineers

- Support senior management with resource allocation and scheduling

The employee is also expected to participate regularly in interactions with global teams spanning Systems, Software & Product Engineering

Skills :

- Experience leading a group of engineers, either technically, managerially, or both

- Expertise in verification methodologies, especially OVM/UVM

- Strong automation & scripting experience is a plus

- Experience with post-Si bring-up & debug

- Very strong verbal and written communication skills

- Ability to work in a dynamic & fast-paced environment, with a pro-active mindset

- Strong knowledge of either high speed serial link protocols, like PCIe, Ethernet, SATA, XAUI etc., or DDR/GPIO PHYs and memory controllers is a big plus

- Experience with formal verification tools is a plus

Experience/Education:

- Preferred BS/MS + 10+ years of experience in RTL design & verification

- Previous experience in at least 5-6 product developments, including post-Si bring-up

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