27/05 Raunak
Recruitment Head at RPM

Views:33 Applications:3 Rec. Actions:Recruiter Actions:1

Verification Engineer - Verilog/ARM (5-10 yrs)

Bangalore Job Code: 448734

Verification : 

Looking for suitable engineers with 5+ years of experience in - SOC/IP/Sub-System Design Verification

- Strong hands-on individual contributors. 

1) Be able and willing to work in a team environment. 

2) Be able to support periodic training session and knowledge sharing sessions.

- Strong debug skills and Automation savvy. 

- Good understanding of ARM (and or DSP) architecture

- Good understanding of mixed-signal building blocks and their verification

- Understanding of power management and its implication on verification

- Test plan creation capturing all the functional requirements

- Create, debug and validate all the test possibilities

- Create IP and SOC test benches

- Coverage (code & test cases) metric based verification sign-off

- Good understanding of Gate-Level simulations and its nuances

- Translate test cases to ATE platform to validate functionality & timing

- Be able to help in silicon debug both on ATE and at system level 

1) Failing test cases 

2) Test case marginalities 

3) Timing characterization

4) Functional issues

- Good knowledge of verilog, SystemVerilog VMM/UVM/C CPF,UPF

- Good knowledge of any of the simulation tools/environments

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