13/11 Neha Jain
IT Recruiter at Infinity HR Consulting Services

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Verification Engineer - Mixed Signal/System Verilog (2-8 yrs)

Bangalore Job Code: 379750

Critical Opening for Bangalore based Organization

Job Title: MIXED SIGNAL VERIFICATION ENGINEER

Job Description:

Candidate will participate in:

- Model creation for mixed signal designs: real value models using System Verilog

- Model Verification: Compare the model against the transistor level reference.

- Most of the work will be on modeling of SerDes, ADC, DAC, PLL.

Experience Level:

- 0-2 years of hands-on experience in digital or analog design.

Responsibilities:

- Ownership of complete model development.

- Ownership of test-bench development for unit and top-level verification

- Responsible for on time delivery and quality of deliverables

- Planning and scheduling of tasks to meet project milestones

- Active involvement in problem solving and implementing opportunities for improvement

- Work with multiple sites in a team environment with offices in India/US/Canada

Education Requirements:

- Very good project experience in M. Tech/MS or B.Tech/B.E. preferably involving use of Verilog, VHDL, C/C++ or Scripting languages like Matlab, Perl

- Preferred University of Choice: IIT, NIT, BITS, IISc or a US University

Prior Experience Requirements :

- Good Hardware, Software or Embedded academic or industry project experience

- Basic or system-level understanding of various Digital and Analog building blocks

- Good communication skills, ability and desire to work as a team

- Detail oriented with strong written and verbal communication skills

Optional Experience :

- Exposure to Cadence Virtuoso environment a huge plus

- Perl/Skill scripting experience a plus

- Noncompromisable Requirements

- Sharp thinking, highly analytical, effective problem-solver and a fast learner

-Independent, self-driven, understands responsibility & accountability

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