Manager - Talent Acquisition at Tessolve Semiconductor Pvt Ltd
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Tessolve - Physical Verification Engineer - ASIC/Synopsys (3-11 yrs)
Job Description :
- Experience in working at lower nodes like 14nm, 10nm, 7nm etc.
- Deep knowledge of Physical Verification tools (Mentor Calibre, Synopsys ICV)
- Experience in working with PnR tools (Cadence Innovus, Atoptech, Synopsys ICC) is a plus
- Previous experience with diverse foundries a strong plus (TSMC, Samsung, GF)
- Skill and experience in scripting using Tcl, Perl or SVRF desirable
- High level ASIC design knowledge
- Knowledge/understanding of device layout, formation and parameters
- Able to work in a team environment and provide critical feedback
- Exposure to Physical Verification activities on Finfet and Double patterning.
Experience : 3to 10 years
Educational Qualification : BE/BTech or ME/MTech
Job Location : Bangalore