Manager - Talent Acquisition at Tessolve Semiconductor Pvt Ltd
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Tessolve - DFX/DFT Architecture Engineer - ATPG/Verilog (4-15 yrs)
DFX / DFT Architectures
Business Unit: VLSI Digital
Exp: 4 to 15 years
No of Position : 10 (Including 2 Leads / 2 Experts)
Job Description :
- Strong knowledge of DFT architectures & methodologies. This includes Scan, BScan, IO DFx, analog DFT, JTAG, Boundary scan, etc with minimum experience of 4+ years.
- Proven knowledge of Verilog, RTL design and micro-architecture skills. Strong knowledge of SoC tools/methodology (Synopsis VCS- and Verdi, Lintra, Spyglass, Tessent ATPG tools, Synopsys ATPG tools, etc).
- Strong Si debug skills, ATE requirements and understanding of volume test requirements. Strong Communications skills and the ability to effectively work with cross functional teams across geographies.
Qualification - Any Engineering Degree or equivalent practical experience.