20/03 Sunilkumar Shilpi
Talent Acquisition at Tata Elxsi

Views:178 Applications:9 Rec. Actions:Recruiter Actions:5

Tata Elxsi - Lead FPGA Design Engineer - RTL/Verilog (8-12 yrs)

Bangalore Job Code: 424435

Job Description :

Skills Required :FPGA: ALTERA, XILINIX, RTL Design, Verilog, VHDL

DOMAIN: Image Processing, Video, Wireless, LTE, Medical, Aerospace

BE/MS with minimum 8-12 years of relevant experience

Preferred Skills::

1. Hands-on experience of FPGA-based prototyping or emulation of complex SoCs

2. Good understanding of the issues involved in ASIC to FPGA RTL preparation

3. Experience with design, verification, post silicon bring-up, and validation

4. Knowledge of Digital Design, VHDL/Verilog/System Verilog, Synthesis, Simulation and FPGA architectures such as Xilinx Virtex 7 and Altera Stratix V

5. Knowledge of a scripting language such as Perl or TCL or Shell

6. Knowledge of ARM buses, display controller or interface, and industry standards (MIPI, HDMI, USB, PCIe, SATA etc.) is a plus

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