HR Recruiter at Swedium Global Services
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Swedium Global Services - ASIC Physical Designer - TCL/Verilog (8-12 yrs)
- CW will assist the DE Leads in executing structural design including Synthesis runs, P&R, APR, Performance Verification involving static timing analysis, FEV and layout verification.
- Advanced TCL expertise in Design compiler synthesis is MUST to sign-off on the design quality
Required Skills(good to have) :
- ASIC and SoC design experience,
- Physical design CAD flows and Design convergence.
- Includes synthesis, APR, STA, LVS and debug.
Preferred Skills :
- Verilog RTL skills, Synthesis and Timing analysis experience,
- Synopsys ICC, DFT tools, scripting in PERL and Shell. Unix.
- Communication and team skills.
- Additional Experience needed BS+experience, MS+experience.
- Intel component design experience preferred HS diploma or GED equivalent required for US candidates.