12/09 Neha Jain
IT Recruiter at Infinity HR Consulting Services

Views:164 Applications:8 Rec. Actions:Recruiter Actions:3

Staff Engineer - SerDes/IP RTL (5-13 yrs)

Bangalore Job Code: 491611

Job Description/Responsibilities :

Primary Responsibilities :

The employee will be responsible for block-level IP RTL design, as well as fullchip level integration RTL design for Achronix's FPGA products. The employee is expected to take independent ownership of complex design challenges, which may include :


- Micro-architecture development

- RTL code development

- Timing constraints development with STA team

- Performance modeling

- Post-Si bring-up

- Automation development for FPGA specific IP generation

The employee is also expected to participate regularly in interactions with global teams spanning System Engineering, Software & Product Engineering

Skills :

- Expertise in micro-architecture development and RTL coding

- Hands on experience of implementing Multi protocol PCS (PCIE/Ethernet/Interlaken) is a must.

- Strong knowledge of Network protocols (PCIE or Ethernet) is a must.


- Should be able to validate third party IP's for performance/area and SoC integration

- Hands on experience in integrating/Validating System interconnect (AXI interconnect) is a plus

- Strong knowledge of DDR/GPIO PHYs and memory controllers is a plus

- Experience with system level performance modeling is a plus

- Experience with post-Si bring-up & debug is a plus

- Experience with synthesis & STA is a plus

Women-friendly workplace:

Maternity and Paternity Benefits

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