IT Recuriter at Infinity HR
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Signal Integrity Engineer - SerDes & Memory Interfaces (4-11 yrs)
Description : Develop state of the art signal integrity solutions for high speed SerDes and memory interfaces
- In this role, the engineer will be responsible for system level modeling of Packages and PCB boards.
- This engineer will model, simulate, correlate and optimize the SerDes and memory interfaces, will provide guideline for Chip designers, IO designers and will help with testing and debug and solves the system level problems related to the memory and serdes channels.
- Works cross functionally with validation, test, chip design, SI and application teams to ensure the successful tape out of the ICs, packages and PCBs.
- Nice to have some understanding of DDR IO specification for DRAMs and controllers, and basic knowledge of equalizations used in SerDes like CTLE, DFE and FFE.
- Perform 2.5D and 3D model extraction and build s-parameter models for packages and PCBs
- Must have a strong understanding of the EM fundamentals and the EM field solvers.
- Must know S-parameters, Smith Charts and Transmission Line theory
- Be able to extract power delivery models for IC/PKG/BRD to help address PDN issues and optimize the system for power delivery related noise and jitter.
- Run system simulations in ADS, HSPICE or Spectre. Understand channel simulation, transient and statistical analysis.
- Knowledge of source synchronous bus simulation is a big plus.
- MS in Electrical Engineering with 4+ years of industry experience
- Must be able to create s-parameter models from PCBs and substrates using HFSS, PowerSI and/or SIWave
- Must know Allegro PCB layout or APD to be able to edit and optimize the design layout for extraction of electrical models.
- Has some experience with simulation of memory interfaces and serial links like PCIe3/4
- Experience in correlating simulation results with lab measurements.
- Must be self-motivated, be able to manage and drive his small projects, have effective communication and presentation skills, a team player
- Must know: HFSS, PowerSI or SIWave, T-Line simulation, HSPICE or ADS, Allegro APD/PCD layout
- Nice to know: Totem and XcitePI