Senior RTL Designer - Mixed Signal/SoC (5-9 yrs)
Our MNC client is a leading semiconductor company designing IC products in High Performance Timing (Clocking), RF and Power Management area.
They are looking for Senior RTL Design to be based at Bangalore with the following :
- Total 5 to 9 years of experience in working with both front-end and back-end digital design teams.
- Must have expertise in module architecture and specification, mixed signal centric digital design SOC.
- Must have experience in development of RTL using Verilog/System Verilog and doing block level testing before hand-off to verification.
- Synthesis of RTL and doing quality analysis of netlist - clock gating, power, gate count analysis, gate level simulations, LEC.
- Must have worked with verification team in helping develop and review test plan for blocks and full device.