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Senior Digital Design Engineer - RTL/Synthesis (3-10 yrs)
Our client is a fabless semiconductor company innovating high performance IC products for IoT Radios, Timing and Portable Audio markets. Founded in 2010 by engineers having extensive global semiconductor product development experience, and is located in Bangalore, India.-
They are looking for Senior / Digital Design Engineer to be based at Bangalore with the following :-
- Total 3 to 10 years of experience in working with both front-end and back-end digital design teams.
- Must have expertise in module architecture and specification, mixed signal centric digital design SOC.
- Must have experience in development of RTL using Verilog/System Verilog and doing block level testing before hand-off to verification.
- Synthesis of RTL and doing quality analysis of netlist - clock gating, power, gate count analysis, gate level simulations, LEC.
- Must have worked with verification team in helping develop and review test plan for blocks and full device.
- Education: Top Institutes only