Founder & Managing Director at Technolo Software Solutions Pvt.Ltd
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Senior Design Verification Engineer - PCIe/Ethernet/USB Protocol (4-9 yrs)
Notice period: 60Days.
- At least 4-5 years of relevant experience in PCIE or Ethernet or USB protocols and NVME SoC verification.
- Strong and relevant expertise with ASIC simulation tools and advanced verification methods.
- Expert level in verification languages such as UVM and System Verilog.
- Relevant experience with writing block-level and SoC test-plans.
- Education: M. Tech / B.Tech/B.E.in electrical engineering, computer science with extensive industry experience.