25/03 Sivarama
Sr. technical Recruiter at eTeam Info Services Pvt Ltd

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RTL/FPGA Designer - C/C++ (4-14 yrs)

Bangalore/Chennai/Hyderabad/Mumbai/Pune Job Code: 425857

Description:

Experience for 5 + years

a) UNIX, shell scripting, PERL scripting

b. Verilog, VHDL

c. Hands on experience in waveform dump, analysis, RTL integration.( Mandatory)

d. Hands on experience on emulation debug and bring up (Zebu/Veloce) ( Mandatory)

e. Good to have : exposure to C/C++

Job Description/Skills needed : 


- 5+ years of RTL, - Verilog, System - Verilog, - VHDL experience Comfortable with Perl and C

- Experience with USB, microprocessor, SDIO/SD/eMMC at RTL Ievel will be plus

- Logic analyzer, PCB/hardware bring up and debug will be plus.

- Protocol Ievel RTL implementation knowledge on USB/OTG, PCIe, eMMC, SDIO/SD, ARC or some microcontroller, SPI, DDR4 memory. .

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