10/06 Sivarama
Senior Technical Recruiter at eTeam Info Services Pvt Ltd

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RTL Design Engineer - Verilog/system Verilog (3-10 yrs)

Bangalore Job Code: 453590

We have an urgent requirement for One of the Product bases MNC sarjapua,

Please find the below Job Description.

Job Description:

- Good understanding of frontend design methodology, RTL design, Simulation, Synthesis and Static Checks ( Lint, CDC & Low Power) and over all IP Quality. 

- Good expertise in HDL (Verilog/System Verilog, VHDL), Scripting (Python, Perl & TCL), MYQSL/MongoDB, C/C++, PHP, 

- Good hands on experience in software coding practices and methodology. 

- Knowledge of version control system like Git/Perforce and web development languages like Javascript, NodeJS, CSS, REST, JSON, XML and YAML would be a big plus.

Experience - 4 + years.

Women-friendly workplace:

Maternity and Paternity Benefits

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