02/07 Priyanka
Technical Recruiter at Infinity HR

Views:210 Applications:16 Rec. Actions:Recruiter Actions:3

RTL Design Engineer - SoC/ASIC/IP (5-20 yrs)

Bangalore Job Code: 462741

Position - Digital Design Engineer/Senior Digital Design Engineer

Location - Bangalore

Responsibilities :

- Develop key blocks of logic in a next generation physical layer/mixed signal SOCs

- Perform hardware feasibility analysis and come up with a micro-architecture specification helping it map to a high performance, implementable design

- Work with verification, DFT, synthesis, circuits, backend implementation teams to realize quality implementation

Requirements :

- Minimum BE/BS degree in Electrical/Electronics/Computer science required

- At least 5-10 years of logic design and RTL coding experience with sound knowledge on verification and implementation concepts

- Experience in physical layer ASIC architecture, micro-architecture development, design and debug

- Ability to code readable, maintainable, verifiable and synthesizable logic in Verilog and/or SystemVerilog

- Experience with lint, synthesis, CDC, STA, formality, ECO process, tool flows and scripting

- Knowledge in one or more of the following areas, a definite plus

- Ethernet (layer 2/3/4 protocols, GMII/XGMII, integration of PHY layer)

- DSP fundamentals/Filter/FFT design/Datapath design/Error Control Coding

- Computer architecture/Processor fundamentals

Preferred Qualifications :

- Strong knowledge of ASIC design methodologies and flows

- Ability to proactively take on responsibilities and competent to work in a start-up environment

- Worked with product development companies and having seen at least a couple of tape-outs

- Experience with silicon bring-up in the lab and debugging is a definite plus

- Experience with FPGA realizations of higher complexity designs

- Ability to work with teams spread across geography with excellent communication skills

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