Talent Acquisition Member at SVENTL ASIA PEC LTD
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RTL Design Engineer/Lead - Synthesis/Verification (5-10 yrs)
Job Role : RTL Design Engineers / Lead
Job location : Bangalore/Hyderabad.
Experience : 5+ Years
- Familiar with RTL design, integration, verification and synthesis (RTL design being a priority)
- Strong coding skills in Perl or other industry-standard scripting languages
- Prior experience in implementing System-On-Chip
- Prior experience in RTL build and design automation
- Excellent communication skills and ability to interface with many groups and build consensus.
- Hands on experience in scripting - perl/shell and make files.
- Hands on experience on Linting tool - Spyglass.
- Good debugging skills.