Director at Core Edge Solutions
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RTL Design Engineer - Block/Module Level Design (3-8 yrs)
Brief Job Description for RTL Design Engineer
Experience : 4-6years
Location : Bangalore
CTC : Among the Best in the Industry
Job Description :
- Minimum 4years of experience in RTL/ASIC design.
- Responsible for block level/module level design.
- Understand Module/Block Specifications, Make conceptual design (algorithm/architecture), signal process flow creation, latency setting, timing chart etc.,
- Should be able to design, micro architect & do RTL coding, Lint, CDC. Should have good understanding of the design concepts for design having multiple clocks & clock domains & also related timings / timing closure
- RTL design implementation and Functional Verification.
- Hands-on RTL coding experience using Verilog/System Verilog.
- Experience with ASIC RTL Design and Verification Tools.
- Strong Timing/STA knowledge.
- Good understanding of bus protocols like AHB/OCP/AXI.
Core Edge Solutions
No.138, 7th Cross.
29th main road,( Lake road)
BTM 2nd stage, Bangalore 560076
Landline: 080 41227439