13/02 Gayathri S
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Principle AMS Verification Engineer - Verilog/System Verilog (6-12 yrs)

Bangalore/Chennai Job Code: 411353

Description :

- Good knowledge of system level description language skills like System Verilog, Verilog-AMS, Matlab, or SystemC.

- Good Knowledge of mixed-signal simulation CADENCE tool environment (SPECTRE, AMS Designer) and/or Questa ADMS tools

- Perform Sub-system and Chip level AMS simulations

- Good understanding of analog macros such as Buck, LDO, ADC/DAC, PLL, Oscillator, Bandgap, Comparator, etc.

- Develop Verilog, Verilog-AMS/Real models for efficient simulations.

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