HR at Global Technologies
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Principal Verification Engineer - ASIC/System Verilog (10-20 yrs)
About Us :
Global Technologies premier human resource placement agency and has established itself as a reputed multi-faceted team of highly qualified and experienced consultants, from diverse professional fields and expertise, who understand the rapid changes taking place in the global business environment. Based in India - third largest pool of skilled manpower in the world, we are well positioned to service the varied staffing needs of diverse business segments. One of our Startup client looking for the below mentioned position.
Position : Principal Verification Engineer
Total experience :10+ yrs
- 10+years, equivalent experience in ASIC design and verification.
- Familiar with System Verilog Assertions, Code and Functional Coverage and Formal verification techniques.
- Experience in verifying designs at system level and block level using constrained random verification.
- Expert in System Verilog and OVM/UVM based verification.
- Strong experience in ASIC design verification flows and DV methodologies.
- Expert in coding SV Testbench, drivers, monitors, scoreboards, checkers
- Highly motivated and be able to work both independently and as a member of team.
- Strong and independent design debugging capability.
- Strong programming and scripting language capability.
- Expert in using verification tools like VCS, IUS, modelsim, Debussy etc.
Note: Please send Cvs only, who can attend the interview weekdays, with short notice period (max 15 days only)
Job Location: Bangalore