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Principal Engineer - System Verilog/Circuit Design (7-12 yrs)
Our client is one of the largest providers of 8, 16 & 32-bit microcontrollers.
Company's Wireless Business Unit R&D Team offers a very interesting, challenging and inspiring job within a highly motivated and passionate Design Team, working on Car Access, WiFi, BT Data and BT Audio system solutions. The task will cover all steps within our project development AMS process and work in cooperation with other functional teams like Design, Layout, CAD, and Test.
Mandatory Skills :
- Strong understanding of the semiconductor fundamentals and CMOS analog circuit designs, device physics, and device modeling
- Good knowledge of system level description language skills like System Verilog, Verilog-AMS, Matlab, or SystemC.
- Good Knowledge of mixed-signal simulation CADENCE tool environment (SPECTRE, AMS Designer) and/or Questa ADMS tools
- Perform Sub-system and Chip level AMS simulations
- Good understanding of analog macros such as Buck, LDO, ADC/DAC, PLL, Oscillator, Bandgap, Comparator, etc.
- Develop Verilog, Verilog-AMS/Real models for efficient simulations.
- Should be able to review and understand chip level electrical specifications and requirements for analog macros
- Good team player and open communicator. Creating new ideas within the scope of the company's goals.
- Education Bachelor degree or higher in Electrical Engineering from reputed Tier 1 / Tier 2 engineering institutions.
- Experience More than 9 years of experience in designing/verifying Analog Mixed Signal CMOS circuits.
Location : Chennai, India
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