09/06 Stalin
Director at Nastech Consulting

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Physical Design Engineer - RTL/Netlist (3-9 yrs)

Bangalore Job Code: 453334

Key words : Physical Design, floorplan, netlist -gds

Job Description :

Experience : 3+ years

- RTL2GDS Implementation

- Power Analysis - IRRV

- Formal Verification

- Static Timing Analysis

- Place and Route

- Clock Tree Synthesis

- Place and Route

- STA

- Block level Execution

- Side flow Execution

- Minimum 3+ years of experience required :

The responsibility includes :

- Independent planning and execution of Netlist-to-GDSII.

- Full exposure to all aspects of design flows like floorplanning, placement, CTS, routing, crosstalk avoidance, physical verification

- Well versed with the level timing closure (STA), timing closure methodologies, ECO generation and predictable convergence.

- Well versed with parasitic extraction, LVS/DRC and other Physical verification checks.

- Should be able to provide clear directions to the team wrt PNR issues Drive methodology with help of local and external CAD/EDA teams for faster design convergence

- Well aware of place and route methodologies and hands on experience with timing convergence.

Minimum Qualifications :

- Work independently in the areas of RTL to GDSII implementation

- Ability to collaborate and resolve issues wrt constraints validation, verification, STA, Physical design, etc.

- Knowledge of low power flow (power gating, multi-Vt flow, power supply management etc.)

- Circuit level comprehension of time critical paths in the design

- Understanding of deep sub-micron design problems and solutions (leakage power, signal integrity, DFM etc.)

- Tcl/Perl scripting Willing to handle technical deliveries with a small team of engineers.

- Strong problem-solving skills

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