Mobiveil - Verification Manager (10-18 yrs)
- Familiar with different aspects of IP development: micro-architecture, RTL & TB implementation, Testplan, Functional coverage, Code coverage and regression, FPGA Validation.
- 10- 18 years of experience working in ASIC verification.
- Experience implementing directed and random test cases.
- Experience in creating test plan, writing test cases and debugging logic.
- Ability to rapidly review and understand complex RTL written in Verilog
- Excellent in PCI-Express serial interconnect protocol.
- Strong analytical skills with attention to detail.
- Fluent in Verilog, Linux/Unix and scripting languages.
- Fluent in System Verilog and Specman.
- Excellent written & verbal communications skills.
- Experienced in OVM/UVM verification environments.
- Very good leadership skills.
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