28/03 Murali
Manager HR at Marvylogic

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Marvylogic - ASIC/FPGA/RTL Engineer - Internship (0-1 yrs)

Bangalore Job Code: 427211

We are hiring the following position on high priority.

Title : VLSI Trainee

- B.E./B.Tech/M.E./M. Tech. in Electronics or equivalent.

- 0-1 years experience in the VLSI/FPGA Design/Verification with familiarity in VHDL/Verilog hardware description languages

- Knowledge of latest tools for synthesis, implementation, verification and debugging

- Experience in Design/Verification of Memory Interfaces (SRAM/DDR/DDRII/FLASH) for ASIC/FPGA's

- Experience in any of the protocol implementations like Ethernet/PCI/USB/ATM for FPGA/ASIC

- Experience in interfacing keyboard/LCD, ADC/ DAC to FPGA and implementation of serial protocols like RS232/422, SPI etc.

- Experience in processor interface design and implementation for FPGA/ASIC will be a plus

- Experience in FPGA optimization, selection, power budgeting and generating requirement specifications, design documents is desirable

- Good communication skills with ability to work in team environment

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