22/11 Shankar
Recruiter at Freelancer

Views:160 Applications:10 Rec. Actions:Recruiter Actions:0

IP Verification Engineer - Verilog/Debugging (3-10 yrs)

Bangalore Job Code: 382950

- Strong experience in IP level Verification

- Strong communication Skills

- Excellent hands-on debug skills

- Strong working knowledge of UNIX environment and scripting languages such as Perl or Python

- Experience of working in complex test-bench/model in Verilog, System Verilog or SystemC

- OVM/UVM Methodology knowledge and experience

- Must have good knowledge on the verification flows

- Knowledge on one of PCIe, USB, MIPI and NVM-Express protocols will be preferred

- Knowledge of system-level architecture including buses like AXI/AHB, bridges, AXI interconnects

- Excellent waveform debug skills using front end industry standard design tools like VCS, NCSIM, Verdi, ModelSim

This job opening was posted long time back. It may not be active. Nor was it removed by the recruiter. Please use your discretion.

Women-friendly workplace:

Maternity and Paternity Benefits

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