14/08 Suman
Business Head at Signon Solutions Pvt Ltd

Views:49 Applications:4 Rec. Actions:Recruiter Actions:1

IP Verification Architect - System Verilog (15-25 yrs)

Bangalore Job Code: 480344

Programmable IP Verification Architect

Job Description :

- This is a leadership position with an exciting new team in India. 

- The Programmable IP Engineering team delivers cutting-edge IPs tailored for Intel FPGA technology. PSG IP (PIPE) team is looking for great engineers to join our team. 

- PIPE teams have the breadth of software, firmware and hardware logic design expertise to serve the entire End-to-End solution enabling.

 - You will be part of a cutting edge technology development team. You will oversee development of new Intellectual Property cores, develop RTL code, software device drivers, drive timing closure, verification, validation and debug of next generation Intel FPGAs.

- As the leader of the Design Verification team, you will be also be responsible for architecting test bench environments, developing verification tools and flows as needed, creating comprehensive test plans, defining and running simulation models, implementing corrective measures for failures, analyzing failure, reviewing verification results against coverage matrix, writing, analyzing and achieving coverage goals. Work closely with customers to understand their systems and provide highly optimized solutions. 

- May also review vendor capability to support development.

Qualifications :

- Bachelor's Degree in Electrical Engineering with 15+ years of experience or Master's Degree in Electrical Engineering or Computer Engineering with 12+ years of experience on ASIC or FPGA hardware, IP design, and verification.

- In depth knowledge with Verilog, System Verilog, RTL design, FPGA design, and FPGA design tools.

- In depth knowledge with one of high speed serial protocols: PCIe/Ethernet.

- Good programming skills (C, C++, perl, python, tcl, etc.).

- Capable of building block and system level testbench from scratch using System Verilog, experienced in UVM constrained random coverage driven concepts, assertion based verification and functional coverage techniques.

- In depth knowledge and experience in design verification, UVM/VMM/OVM.

- Experience in Design and verification tools: simulation tools and debug tools.

- End-to-end System level experience including design, software, firmware and hardware.

- Proactive, self-motivated and quick learner.

- Good team spirit and ability to deliver to schedule.

- Excellent analytical and problem solving skills.

- Strong verbal and written communication skills.

- Ability to multi-task and work in a dynamic environment.

- Must have experience working closely with customers, understanding their systems and providing optimized solutions.

Inside this Business Group :

The Programmable Solutions Group (PSG) was formed from the acquisition of . As part of Company, PSG will create market-leading programmable logic devices that deliver a wider range of capabilities than customers experience today. Combining Altera's industry-leading FPGA technology and customer support with world-class semiconductor manufacturing capabilities will enable customers to create the next generation of electronic systems with unmatched performance and power efficiency. 

PSG takes pride in creating an energetic and dynamic work environment that is driven by ingenuity and innovation. We believe the growth and success of our group is directly linked to the growth and satisfaction of our employees. That is why PSG is committed to a work environment that is flexible and collaborative, and allows our employees to reach their full potential.

Add a note
Something suspicious? Report this job posting.