27/06 Ratul Chakraborty
Talent Acquisition at Graphene Semiconductors

Views:229 Applications:21 Rec. Actions:Recruiter Actions:6

Graphene Semiconductors - DFT Engineer/Senior DFT Engineer - VLSI Domain (3-12 yrs)

Bangalore Job Code: 242849

If you are passionate about Design For Testability (DFT) and having the below skills then do mail me your updated profile.

Experience : 3 to 12 yrs

Job Location : Bangalore/ Malasia

Qualification : BE/BTech, ME/MTech ( VLSI Domain )

JD:

- Strong knowledge and experience in Scan Insertion, TestKompression, ATPG,

Memory BIST and JTAG at IC - level for mixed signal designs.

- Experience in using Mentor DfT tools, Cadence RC and simulator tools

- Define DfT Strategy and Requirement Specification for the design

- DfT verification for gate-level and timing simulations

- Work cross sites with design team to define and implement DfT.

- Hands on experience in solving DfT problems, simulation failures, ATPG coverage and DRC improvements.

- Work with STA engineer to define timing constraints for DfT modes

- Support Test engineer in silicon debug and pattern delivery for ATE

- Experience in RTL coding, shell scripting

- Experienced in handling analog DfT simulations .

- Be fluent with all common concepts of DfT and DfT tools.

This job opening was posted long time back. It may not be active. Nor was it removed by the recruiter. Please use your discretion.

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