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26/09 Manjula Kumbar
Semiconductor Recruiter at Swedium Global Services

Views:518 Applications:43 Rec. Actions:Recruiter Actions:22

FPGA Verification Engineer - RTL/System Verilog (5-12 yrs)

Overseas/International/EU/Finland Job Code: 497754

Skills :

Total Experience : 5+ Years

Description :

- RTL verification of FPGAs

- Good knowledge of system Verilog/Verilog

- Good knowledge in Verification methodologies, preferably UVM

- Knowledge of scripting language preferably in Python and Perl

- Test environment in Python and Perl

Women-friendly workplace:

Maternity and Paternity Benefits

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