Founder at APPRAISE HR SERVICES
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FPGA Emulation Engineer - RTL Design/Verilog (4-10 yrs)
Basic Qualifications :
- Creates Emulation models from RTL design using Emulation tools.
- Strong expertise into Emulation with Palladium, Veloce platforms at least one of them.
- Should have good knowledge in implementing Bigger designs in multiple FPGA's/HAPS platforms.
- Familiarity with FPGA synthesis.
- Working knowledge XILINX Virtex FPGA architecture and experience with ISE tool flow
- Good Knowledge of protocols: AXI/AHB, bridges, memory controllers such as DDR/Nand, and peripherals such as USB, PCIe, USB, &, Memory
- Good programming skills i.e. Verilog, VHDL, SV, C/C++ is a must.
- Knowledge of Virtex or Kintex UltraScale is a definite plus.
- Good written and oral communications skills required.