22/08 Priya Gupta
Senior Talent Scout at Intileo Technologies

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DFT Lead Engineer - Verilog/MBIST/LBIST (8-15 yrs)

Greater Noida Job Code: 483378

Role Purpose :

- A DFT activity leader role. The incumbent will be responsible for leading a few of the activities of advanced FT/DFD/DFM (design for test/debug/manufacturability) techniques for developing an innovative Driver Assistance System(ADAS) for futuristic cars from the stable of leading car manufacturers.


- The candidate selected will also be involved in all aspects of DFT including methodology development, vector development, manufacturing testing, and debug.


The job perimeter includes :

- DFT architecture specification

- DFT RTL coding and integration.

- SCAN and LBIST insertion

- High-Speed interface DFT management

- Memory BIST specification and insertion

- Interaction with Front End, Back End &Test Engineers located at various sites

Skills Required :


- Strong teamwork and communication and quick learning are key skills.

- Good RTL (VHDL or Verilog or System Verilog) writing skills

- SOC integration and RTL modification as per DFT requirement.

- Good at DFT Spyglass checks.

- Expert of DFT technique and tools (Scan, ATPG, JTAG, LBIST, DFT architecture)

- Working Knowledge of MBIST architecture and tools (SMS, MMB).

- Working Knowledge in a scripting language (TCL, Perl, MASIS)


- Working Knowledge of High-Speed interface testing is a plus (i.e. LPDDR4, PCI, MIPI)

- Expertise to use industry standard tools like Tetramax, Design Compiler, etc.

- Expertise in RTL and Back Annotated Gate-level simulations and debug especially GLS for ATPG.

- Working Knowledge of Boundary Scan Testing and testing of IPs viz ADC, FLASH, PMU in standalone mode.

- Working knowledge of the Latest technique viz. Low power ATPG, Analog Bist, Logic Bist would be appreciated and preferred.

- PT2TMAX flow for ATPG STA is desirable.

Women-friendly workplace:

Maternity and Paternity Benefits

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