DFT Lead Engineer - ASIC (9-15 yrs)
Role : DFT Lead
Experience : 8 to 12+ years
Job Location : Hyderabad - Fulltime
Mandatory Skills :
- Full-chip DFT leadership experience with multiple design Tape Outs
- Test architecture creation and drive the Complete full Chip DFT implementation & verification of complex ASICs
- Proven Experience in Stuck-At, TDF, MBIST, BSCAN/JTAG, IDDQ schemes & verifications.
- Chip-level & hierarchical Scan insertion with Compression Techniques (EDT/OPMISR+)
- Hands on Experience with Synopsys/Tessent/Cadence DFT tools & flows
- Leading junior teams and Mentoring.
Details Required :
Total Exp :
Rel Exp :
Notice Period Required :
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