07/09 Satish Nadiger
Consultant TA at Volentis network

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DFT Engineer - Verification/STA/EDA (5-10 yrs)

Bangalore Job Code: 359474

- DFT architecture definition w.r.t. test time/cost, coverage, test power. 

- Good experience/concept on all aspect of DFT i.e. SCAN/ATPG, MBIST, Boundary Scan.

- DFT logic integration and verification.

- Experience on debugging low coverage.

- Gate Level DFT verification with and without timing.

- Pattern generation, verification and delivery to ATE team.

- Post silicon debug and support on failing patterns.

- Experience of leading small DFT team is plus.

- Good experience on EDA tools of reputed vendor like Mentor, Synopsis. LBIST experience is plus.

- DFT mode STA and timing closer support

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