25/07 Pooja Singh
Senior Recruiter at First Employer

Views:200 Applications:5 Rec. Actions:Recruiter Actions:0

DFT Engineer - Mixed Signal/Memory Testing (5-10 yrs)

Bangalore/Noida Job Code: 472404

Role : DFT Engineer - Noida /Bangalore /Taiwan (on site location))

The candidate is expected to have worked on :

- Scan insertion and DRC cleanup

- Pattern generation for Stuck- At, delay test, iddq, path delay and fault grading.

- Memory testing. 

- Should also know the algorithms.

- Should also have knowledge about diagnostics. JTAG or P1500 or other interface mechanism

Desirable competencies :

The candidate is expected to have exposure to :

- Compression tools is highly desirable

- LBIST, mixed- signal testing, logic equivalence

- Writing test benches and should be capable of writing RTL code for DFT blocks as and when required.

- Bridge fault detection is desirable

- ATE experience is an added advantage

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