Technical Recruiter at Infinity HR
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DFT Engineer - MBIST/Timing Closure (3-7 yrs)
Job Title : DFT Expert ( Design Engineer/Sr Design Engineer
LOCATION - Delhi
Detailed Job Description :
- Person with BE electronics from reputed institute with distinction in 10th/12th/BE with 3-7 years corporate experience in DFT.
- He should have expertise in Design for Test DFT design implementation of Large SOCs including DFT insertion, ATPG, fault simulations, Boundary scan, logic BIST, ad-hoc DFT tests.
- You will be responsible for design, implementation and verification of all aspects of DFT on complex IPs and chips at advanced process technology nodes viz. 14nm/10/7nm including :
1) Test architecture definition
2) Identifying and implementing RTL changes for DFT
3) Developing constraints for scan insertion and test mode timing closure
4) Scan and ATPG for different fault models
5) MBIST implementation and verification
6) Boundary scan, ACJTAG, IEEE 1500 implementation and verification
7) IEEE1687 (iJTAG) and fault grading for functional manufacturing tests
8) Running zero delay and timing simulations and debugging on all the above aspects
- You will be working on very high speed and low power designs.