Principal Consultant at Symmetrical Global
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DFT Engineer - ATPG/Mixed Signal - VLSI Domain (3-8 yrs)
Experience : 3 to 8 yrs
Qualification : BE/BTech, ME/MTech ( VLSI Domain )
Required skills :
- Strong knowledge and experience in Scan Insertion, Test Kompression, ATPG, Memory BIST and JTAG at IC - level for mixed signal designs.
- Experience in using Mentor DFT tools, Cadence RC and simulator tools
- Define DFT Strategy and Requirement Specification for the design
- DFT verification for gate-level and timing simulations
- Work cross sites with design team to define and implement DFT.
- Hands on experience in solving DFT problems, simulation failures, ATPG coverage and DRC improvements.
- Work with STA engineer to define timing constraints for DFT modes
- Support Test engineer in silicon debug and pattern delivery for ATE
- Experience in RTL coding, shell scripting
- Experienced in handling analog DFT simulations
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