IT Recruiter at Infinity HR Consulting Services
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DFT Design Engineer - RTL/VHDL/Verilog (5-10 yrs)
Tetramax, Testcompress, RTL compiler,DFT Design,DFT Expert,
Super Hot Hiring for Greater-Noida,Bangalore based Semiconductor Organization
Job Title: DFT Expert ( Design Engineer/Sr Design Engineer)
Experience - 4 -10 years
Education- Btech/Mtech Electronics, good academic credentials
Detailed Job Description:
- Responsible to implement complete design testability cycle from architecture to silicon testing.
- To ensure adherence to corporate and automotive Testability targets by defining, planning and executing complete flow of DFT, ensuring high coverage, complete Testability, support to failure analysis and Silicon support to reach Maturity targets
Skills Required :
- Good RTL(VHDL or Verilog or system verilog) writing skills and/or the ability to create environment using the industry standard tools like Tetramax, Testcompress, RTL compiler, Design Compiler, etc.
- Clear concept about scan based design.
- Knowledge on ATPG and different Fault Models (SA, Transition, Iddq, SDD etc)
- Coverage improvement techniques
- SOC integration and RTL modification as per DFT requirement.
- Usage of any one of the industry standard DFT tool (Tetramax, Testcompress, RTL compiler etc)
- Basic knowledge of following :
1) synthesis constraints,
3) Silicon defects and its logical effects
- Awareness of Latest technique viz. Scan compression, Analog Bist, Logic Bist would be appreciated and preferred.
Please send me your updated profile.