09/05 Mohammed Parvez
Global Recruitment Manager at Triadss Tech Solutions

Views:299 Applications:36 Rec. Actions:Recruiter Actions:1

Design Verification Engineer - System Verilog (2-8 yrs)

Bangalore/Noida Job Code: 442010

MNC Client hiring and should be willing to join in 30 days

Please see the JD below and apply

Skills:

- Experience with SV/UVM/OVM/VMM with PCIe/USB(Mandatory 6 months experience or Specman/eRM/UVMe

- Experience with SOC with C/ASM based tests, Graphics or CPU is an added advantage

- SOC - System on Chip Verification; lot of IP's (100 )


- Proficient on protocols - AXI, AHB, USB, PCIe, DDR, LPDDR, HDMI, MIPI, Ethernet.

- Should have good understanding of Digital Design Flow (CDC, Low Power, HDL Simulation, Synthesis) & Tools

- Preferred to have know-how of ARM Cortex-A series Cores like A7 ; AMBA Busses - AXI, AHB, ATB, APB and Associated Peripheral / Debug components.

- Experience of working in complex test-bench/model in Verilog, System Verilog or SystemC

- System Verilog - Language like C

- UVM - methodology

- Specman e Language - language like Verilog similar to SV

- Methodology used is eRM

- Everyone is migrating to SV

- ARM based processor on above lot of IP configured, 5 - 10 ARM core, IP's like PCI, USV, Ethernet, SPI, Sadus, Memory controllers, DDR, I2C

Qualification: B.E/B. Tech or M.E/M. Tech/M.S in Electrical or Electronics

Women-friendly workplace:

Maternity and Paternity Benefits

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