Manager at Ziolite Recruitment Solutions
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Design Verification Engineer (1-10 yrs)
Location : Bengaluru
University Degree in Computer Science/Engineering, Information Technology/System, or other relevant disciplines is essential.
Job Description :
DV-Design Verification :
- Experience with SV+UVM/OVM/VMM or Specman/eRM/UVMe
- Experience with SOC with C/ASM based tests, Graphics or CPU is an added advantage
- SOC - System on Chip Verification; lot of IP's (100 - .)Proficient on protocols - AXI, AHB, USB, PCIe, DDR, LPDDR, HDMI, MIPI, Ethernet.
- Should have good understanding of Digital Design Flow (CDC, Low Power, HDL Simulation, Synthesis) & Tools
- Preferred to have know-how of ARM Cortex-A series Cores like A7 ; AMBA Busses - AXI, AHB, ATB, APB and Associated Peripheral / Debug components.
- Experience of working in complex test-bench/model in Verilog, System Verilog or SystemC
- System Verilog - Language like C
- UVM - methodology
- Specmane Language - language like Verilog similar to SV
- Methodology used is eRM
- Everyone is migrating to SV
- ARM based processor on above lot of IP configured, 5 - 10 ARM core, IP's like PCI, USV, Ethernet, SPI, Sadus, Memory controllers, DDR, I2C
- Excellent communication skills
- Perform problem analysis, solution determination, code design and development, integration, test and modification.
- Involve in development of various core components for project & customer specific enhancements and also responsible in Bug fixing for the same.
- Involve in the entire lifecycle of the project starting from requirement understanding to the final deployment.
- Provide quick support by fixing critical bugs in the absence of the leads.
If Interested Please fill form :
1. Graduation/post-Graduation -
2. Total Experience (in Years) -
3. Current CTC -
4. Expected CTC -
5. Notice Period -
Hoping for a positive apply.