22/08 Priya Gupta
Senior Talent Scout at Intileo Technologies

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Backend Design Lead - Netlist/GDS/SoC (8-15 yrs)

Greater Noida Job Code: 483307

Job Description :

Role Purpose :

- The incumbent will be involved in design Implementation (Netlist2GDSII flow) for innovative solutions in the field of Sensors, Consumer Durable Products & Cars.

- Complete Responsibility of full Place & Route, SOC along with leading a project team consisting of 5 - 8 engineer

- A technical mentor to the younger engineers & be able to guide them through the project.

- Strong focus on physical design having experience with lower technologies like 7nm FINFET & alike.

Roles & Responsibilities :

- Responsible for executing full Netlist2GDSII i.e. IO ring design, Floorplan, placement, CTS, routing, timing closure and Physical verification of full SOC and Blocks.

- Also responsible for power evaluation, IR Drop, Area estimation and partitioning and planning of blocks from top level.

- Need to lead or coordinate various activities of SOC Implementation with-in the team and interaction with CAD team, Design teams and Customer, using leading-edge technologies like 7nm FINFET and 28FDSOI, apart from the obvious challenge of reducing Area, mask re-spin, consumption and increasing performance, striving for zero PPM, crypto subsystem leveraging e-Flash etc.

Skills Required :

- Knowledge of full Netlist to GDSII flow ( Synthesis, STA, Floorplan, CTS, PnR, DRC/LVS, SI, IR Drop ) & leading a team of 5 - 8 engineers

- Hands-on experience with Cadence PnR tool, PnR, Floorplanning, CTS and STA with PT.

- Exposure to Synthesis with DC & leading a team in this area.

- Know-how of leading-edge technologies like 16nm/7nm FIFET and 28FDSOI

- Know-how of handling leading-edge technologies like 16nm/7nm FIFET and 28FDSOI

- Should have a good understanding of Verilog/VHDL

- Exposure to low power techniques

- Knowledge of Tcl and Perl scripting is a must

Women-friendly workplace:

Maternity and Paternity Benefits

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