ASIC Verification Engineer - OVM/UVM/VMM (2-13 yrs)
Experience : 2Yrs - 13 Yrs
- He/She will be responsible to execute development and verification activities individually/in team with/without guidance.
- He/She will be involved in developing Testbench for the Block / Cluster, Testcases, Tesplans and Functional and Code coverage closure activities and reviews of documents and code.
- He/She will be individually responsible for successful delivery to clients for given tasks/module of Testbench/Testcases.
- He/She will responsible for the Client Support activities which conference call on reviews and Bug closure.
- At-least 1 year of experience in OVM/UVM/VMM/Test Harness.
- Experience in developing test and coverage plan and Verification environment.
- Knowledge of industry standard protocols like Ethernet, PCIe, MIPI, AXI-AHB Bus etc. will be added advantage.