07/03 Surendranatha Reddy
Account Manager at Sampoorna Computer People

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ASIC SoC Architect - VHDL/Verilog (11-18 yrs)

Chennai Job Code: 419611

Job Responsibilities :

Client is looking for highly motivated, ambitious SoC architects to develop next generation SoCs. In this highly challenging role, the individual will architect Clientsstate-of-the-art SoCs that are integral to Clients 4G and 5G cellular products.

As an SoC architect, the individual will be part of a best-in-class team responsible for pursuing various architectural challenges in the development of next generation SoCs that cater to a growing range of wireless and IoT applications.

- The individual must have the ability to work closely with Marketing, Product definition, RTL design, Physical Design, Verification, SW and Test teams and be able to grasp technologies and project needs quickly, balance the priorities, regularly and proactively engage with the stakeholders to get things done on time with the best quality and with minimal supervision.

- The individual is also responsible for evaluating/finalizing third party digital and Analog IP(s) and integrating the third party IP with Clients SoC and also should able to make buy/make recommendations on the key IP(s).

- The individual should able to determine, specify and evaluate the viability of complex hardware features and structures and ensures that software and hardware designs interface correctly.

- Should able to make recommendation on key design trade-offs with high-performance/low-power IPs

- Should able to identify, analyse and resolves sub-system and/or SoC design challenges and provide architectural guidance throughout the design process from concept through mass volume production.

Job Requirements :

- Minimum 10+ years of experience in Design & Architecture exp with focus on System level trade-offs for complex SoC.

- In-depth knowledge and exp in complex SoC architecture, including CPU(s), DSP(s), high/slow speed communications peripherals, memory interface, multi-domain clocking, bus and interconnect structures is a must.

- Extensive architectural knowledge of high data rate, high performance and low latency and low power SoC design preferably in advanced CMOS technologies is a must.

- Experience in front-end ASIC/SoC design is essential.

- Proficiency in Verilog or VHDL is essential.

- Thorough knowledge of latest EDA tools for front end design and synthesis is a plus.

- Experience in RTL design including design reviews, RTL implementation, synthesis and verification methodologies, chip bring up and lab validation is essential.

- Design experience with the following interfaces: USB, SDIO, DDR, Ethernet, CSI, Flash memory interface is Preferred.

- Experience in early stage power estimation and design optimization for ultra low power SoC solution is a plus.

- Requires excellent interpersonal skills with proven ability to work effectively in a fast-paced environment. Should be a good team player with good communication skills.

- Must have strong documentation skills

- For more clarifications/information on the Client, feel free to contact SN Reddy at 9980403217

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