14/03 T Sundaresan
Lead Recruiter at Enlist Management Consultants Private Limited

Views:103 Applications:3 Rec. Actions:Recruiter Actions:2

ASIC Design Verification Engineer - System Verilog (8-12 yrs)

Bangalore Job Code: 422230

Job Description :


- Working experience in IP / SoC verification

- Should have the expertise to develop block level / system level verification environments using System Verilog and UVM / OVM

- Experience to develop BFMs / Checkers / monitors / Scoreboards

- Should have developed block/system level verification plans and tests. Should have the capability to debug test failures to find the root cause.

- Should have worked on code / functional coverage.

- Experience in constrained random testing is a plus.

- Experience in PCIe / Ethernet / DDR / USB / Bluetooth protocols will be PLUS

- Knowledge of scripting languages like Perl, Tcl

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